Deskripsi: CADENCE LIRARIES/INTRFC MAINT
Deskripsi: INTEGRAPH SCHEM SYNTH/SIM LIBRA
Deskripsi: EXEMPLAR SYNTHESIS LIBS/INTRFC
Deskripsi: SYNOPSYS LIBRARIES/INTRFC MAINT
Deskripsi: INTEGRAPH SCHEM SYNTH/SIM MAINT
Deskripsi: PRO CHIP SOFTWARE LICENSE
Deskripsi: SYNOPSYS LIBRARIES/INTRFC MAINT
Deskripsi: MENTOR V8 LIBRARIES/INTRFC MAINT
Deskripsi: CADENCE VERILOG LIB/INTRFC MAINT
Deskripsi: EXEMPLAR SYNTHESIS LIBS/INTRFC
Deskripsi: FPGA DESIGN SYS W/VWDRAW/VIEWSIM
Deskripsi: ATMEL SYNARIO VERILOG SIM OPTION
Deskripsi: ATMEL SYNARIO VHDL SYNTHESIS OPT
Deskripsi: ATMEL SYNARIO VHDL SYNTHESIS OPT
Deskripsi: ATMEL SYNARIO BASIC PACKAGE
Deskripsi: MENTOR V8 LIBRARIES/INTERFACE
Deskripsi: UNIV AT6000 PHYSICAL DESIGN SYS
Deskripsi: FPGA DESIGN SYSTEM W/VIEWDRAW
2025/05/20